The present invention relates to a semiconductor integrated circuit device which is substantially free of any defect and is highly reliable and also, to a method for manufacturing such a device wherein it is easy to remedy defective chips and to replace an element by a fresh one.
A technique for remedying a defective chip during the course of the manufacture of semiconductor integrated circuit devices is described, for example, in Japanese Patent Laid Open No. 174538/91. This technique will now been outlined.
First, a plurality of macrocells having the same circuit function is formed on the surface of a substrate having a silicon-on-insulator structure (hereinafter referred to simply as SOI substrate), and a wiring is formed for each macrocell. The term "macrocell" used herein means a fundamental circuit element for constituting a semiconductor integrated circuit device in a chip region, i.e., a unit for realizing function by means of an electric circuit. At this stage, individual macrocells are electrically isolated from one another.
At the outer periphery of the macrocells formed are substrate main surface side-dividing trenches which arrive at the underlying insulating layer of a substrate of the SOI structure or at a portion which is slightly deeper than the underlying insulating layer. An insulating film comprising silicon dioxide (SiO.sub.2) is filled up in each trench.
Subsequently, the circuit function and electric characteristics of the individual macrocells within the chip region are checked. The term "chip" used herein means a unit capable of realizing function by integration of the macrocells. The insulating film in a dividing trench at the outer periphery of the macrocell which has been judged as defective is removed. Thereafter, the SOI substrate is formed at the opposite side thereof with a back side-dividing trench, which is positioned in correspondence with the defective macrocell, until the back side-dividing trench arrives at a corresponding main surface side-dividing trench. By this, the defective macrocell is removed.
A good quality macrocell (hereinafter referred to as good macrocell), which is removed from other SOI substrate according to a procedure such as, for example, for removing for the defective macrocell, is mounted in position where the defective macrocell has been removed. Finally, a synthetic resin such as polyimide is filled up in the back side-dividing trench, thereby fixing the good macrocell.
The macrocells are electrically interconnected by means of wirings, thereby forming an intended semiconductor integrated circuit.
We have found that the above prior art has the following problems.
In prior art, removal of a defective or good macrocell essentially requires a trench which has been preliminarily formed at the back side of the substrate. When using a laser beam for the formation of the trench, a number of microcracks are undesirably produced in the substrate. Even if a damaged layer is removed by chemical etching, the damaged range is wide and it is difficult to check how far the microcracks have been removed. Thus, this leads to the problems such as of degradation of processing accuracy and a lowering in reliability of the semiconductor device.
The degradation of processing accuracy would have the possibility of placing a very severe limitation on the removal of defective macrocells and also on the distance between individual macrocells on mounting of a good macrocell.
In addition, the processes for the defective macrocell and good macrocell become complicated, with an attendant problem that the costs are increased as a whole.